diff --git a/board/amcc/yellowstone/yellowstone.c b/board/amcc/yellowstone/yellowstone.c
index c2b7cf1..7ca60b6 100644
--- a/board/amcc/yellowstone/yellowstone.c
+++ b/board/amcc/yellowstone/yellowstone.c
@@ -56,25 +56,6 @@
 	mtebc(pb5cr, 0x00000000);
 
 	/*--------------------------------------------------------------------
-	 * Setup the interrupt controller polarities, triggers, etc.
-	 *-------------------------------------------------------------------*/
-	mtdcr(uic0sr, 0xffffffff);	/* clear all */
-	mtdcr(uic0er, 0x00000000);	/* disable all */
-	mtdcr(uic0cr, 0x00000009);	/* ATI & UIC1 crit are critical */
-	mtdcr(uic0pr, 0xfffffe13);	/* per ref-board manual */
-	mtdcr(uic0tr, 0x01c00008);	/* per ref-board manual */
-	mtdcr(uic0vr, 0x00000001);	/* int31 highest, base=0x000 */
-	mtdcr(uic0sr, 0xffffffff);	/* clear all */
-
-	mtdcr(uic1sr, 0xffffffff);	/* clear all */
-	mtdcr(uic1er, 0x00000000);	/* disable all */
-	mtdcr(uic1cr, 0x00000000);	/* all non-critical */
-	mtdcr(uic1pr, 0xffffe0ff);	/* per ref-board manual */
-	mtdcr(uic1tr, 0x00ffc000);	/* per ref-board manual */
-	mtdcr(uic1vr, 0x00000001);	/* int31 highest, base=0x000 */
-	mtdcr(uic1sr, 0xffffffff);	/* clear all */
-
-	/*--------------------------------------------------------------------
 	 * Setup the GPIO pins
 	 *-------------------------------------------------------------------*/
 	/*CPLD cs */
@@ -110,6 +91,25 @@
 #endif
 
 	/*--------------------------------------------------------------------
+	 * Setup the interrupt controller polarities, triggers, etc.
+	 *-------------------------------------------------------------------*/
+	mtdcr(uic0sr, 0xffffffff);	/* clear all */
+	mtdcr(uic0er, 0x00000000);	/* disable all */
+	mtdcr(uic0cr, 0x00000009);	/* ATI & UIC1 crit are critical */
+	mtdcr(uic0pr, 0xfffffe13);	/* per ref-board manual */
+	mtdcr(uic0tr, 0x01c00008);	/* per ref-board manual */
+	mtdcr(uic0vr, 0x00000001);	/* int31 highest, base=0x000 */
+	mtdcr(uic0sr, 0xffffffff);	/* clear all */
+
+	mtdcr(uic1sr, 0xffffffff);	/* clear all */
+	mtdcr(uic1er, 0x00000000);	/* disable all */
+	mtdcr(uic1cr, 0x00000000);	/* all non-critical */
+	mtdcr(uic1pr, 0xffffe0ff);	/* per ref-board manual */
+	mtdcr(uic1tr, 0x00ffc000);	/* per ref-board manual */
+	mtdcr(uic1vr, 0x00000001);	/* int31 highest, base=0x000 */
+	mtdcr(uic1sr, 0xffffffff);	/* clear all */
+
+	/*--------------------------------------------------------------------
 	 * Setup other serial configuration
 	 *-------------------------------------------------------------------*/
 	mfsdr(sdr_pci0, reg);